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author | H. Peter Anvin <hpa@trantor.hos.anvin.org> | 2008-12-27 16:06:55 -0800 |
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committer | H. Peter Anvin <hpa@trantor.hos.anvin.org> | 2008-12-27 16:06:55 -0800 |
commit | 74a8fa54402b6c05848d8c3f464280fda201719e (patch) | |
tree | 6ca94e884305ccf8b26c8d861a6a5571269e77db | |
parent | ce618230885d4a84acd8b037942f3832b833cd23 (diff) | |
download | abc80-74a8fa54402b6c05848d8c3f464280fda201719e.tar.gz abc80-74a8fa54402b6c05848d8c3f464280fda201719e.tar.xz abc80-74a8fa54402b6c05848d8c3f464280fda201719e.zip |
Test pattern on SW5, move printer/V.24 to SW3abc80-de1-6
-rw-r--r-- | CHANGES | 7 | ||||
-rw-r--r-- | abc80.v | 7 | ||||
-rw-r--r-- | display.v | 48 |
3 files changed, 31 insertions, 31 deletions
@@ -1,3 +1,10 @@ +Changes in release DE1-6: +------------------------- +* SW5 now produces a LCD monitor calibration pattern on the screen. + +* Printer/V.24 moved to SW3. + + Changes in release DE1-5: ------------------------- * Fix hang on reset with no SD card inserted (or SW0 off.) @@ -280,6 +280,7 @@ module abc80 ( .width ( video_width ), .reverse ( sw[7] ), .noblink ( sw[6] ), + .testpattern ( sw[5] ), .reveal ( ~key_n[0] ), .a ( video_a ), .d ( video_d ), @@ -520,12 +521,12 @@ module abc80 ( assign v24_cts = piob_ao[4]; // Pin assignments for V.24 - assign v24_dtr = ~sw[5]; + assign v24_dtr = ~sw[3]; assign v24_rts = 1'b0; - assign v24_rxd = sw[5] ? uart_rxd : 1'b1; + assign v24_rxd = sw[3] ? uart_rxd : 1'b1; // Outbound UART port - assign uart_txd = sw[5] ? v24_txd : pr_txd; + assign uart_txd = sw[3] ? v24_txd : pr_txd; assign pr_cts = 1'b0; // Cassette outputs @@ -1,32 +1,21 @@ module display ( - clk, - width, - reverse, - noblink, - reveal, - a, - d, - ga, - gd, - rgb, - vsync, - hsync + input clk, + + input width, + input reverse, + input noblink, + input testpattern, + input reveal, + + output [10:0] a, + input [7:0] d, + output [10:0] ga, + input [7:0] gd, + + output reg [2:0] rgb, + output reg vsync, + output reg hsync ); - input clk; - input width; - input reverse; - input noblink; - input reveal; - output [10:0] a; - input [7:0] d; - output [10:0] ga; - input [7:0] gd; - output [2:0] rgb; - reg [2:0] rgb; - output vsync; - reg vsync; - output hsync; - reg hsync; // We use the standard VGA "text" monitor timings mode, // htime = 31.77 us (31.47 kHz), vtime = 14.27 ms (70 Hz) @@ -160,7 +149,10 @@ module display ( // The x[9:4] means ignore the first character prefetch. We really // should realign the counters, here. if ( xvideo & yvideo & ~prefetch ) - if ( pixrow[7] & ~(do_flsh & ~flash_on) & ~(do_hide & ~reveal) ) + if ( testpattern ) + // Pixel test pattern for LCD monitor calibration + rgb <= {3{x[0] ^ y[0]}}; + else if ( pixrow[7] & ~(do_flsh & ~flash_on) & ~(do_hide & ~reveal) ) rgb <= fg ^ {3{invert}}; else rgb <= bg ^ {3{invert}}; |