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authorH. Peter Anvin <hpa@zytor.com>2007-01-28 00:16:16 (GMT)
committerH. Peter Anvin <hpa@zytor.com>2007-01-28 00:16:16 (GMT)
commit34626e39ca18763947c58d5b034fc36a07328bf6 (patch)
treea91105d3a978ea9d43a6e7e294de2f07c00d571d
parentea1a29a2f145cc5baf1fc28ad05a2f72b495cfdd (diff)
downloadcfplayer-34626e39ca18763947c58d5b034fc36a07328bf6.zip
cfplayer-34626e39ca18763947c58d5b034fc36a07328bf6.tar.gz
cfplayer-34626e39ca18763947c58d5b034fc36a07328bf6.tar.bz2
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Second-order delta-sigma DAC; clock at 100 MHz due to the more complex
logic.
-rw-r--r--README14
-rw-r--r--pll1.bsf84
-rw-r--r--pll1.v363
-rw-r--r--pll1_bb.v261
-rw-r--r--sound.v36
5 files changed, 446 insertions, 312 deletions
diff --git a/README b/README
index fc950ab..01700cc 100644
--- a/README
+++ b/README
@@ -17,16 +17,16 @@ channel, connected to a low-pass filter with a 3 dB cutoff of only
about 10 kHz. The sound coming out of this design isn't stellar, but
it's definitely much better than you'd think.
-Version 1 used a 12-bit PWM DAC, version 2 and later use an
-underclocked 16-bit delta-sigma DAC. The latter is significantly
-better, even though it is only clocked at 200 MHz (for proper 16-bit
-resolution, a clock frequency of about 2.9 GHz would be required.)
-Even that would not really help given the low cutoff of the low-pass
-filter on this board.
+Version 1 used a 12-bit PWM DAC, version 2 and 3 used a first-order
+delta-sigma DAC clocked at 200 MHz, and version 4 uses a second-order
+delta-sigma DAC clocked at 100 MHz.
+
+I suspect most of the remaining noise is due to the analog circuitry,
+and the low cutoff of the low-pass filter on this board.
Versions 1-3 were mono due to underrun problems. This turned out to
be a very silly problem -- cf_power was left floating, which resulted
-in the CF card running out of power, depending on the access rate...
+in the CF card running out of power, depending on the access rate.
On a chip with DSP blocks it might be possible to get better
high-frequency response by applying a preemphasis filter; I haven't
diff --git a/pll1.bsf b/pll1.bsf
index 7d6ef94..bd8735b 100644
--- a/pll1.bsf
+++ b/pll1.bsf
@@ -4,30 +4,24 @@ editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/
/*
-Copyright (C) 1991-2004 Altera Corporation
-Any megafunction design, and related netlist (encrypted or decrypted),
-support information, device programming or simulation file, and any other
-associated documentation or information provided by Altera or a partner
-under Altera's Megafunction Partnership Program may be used only
-to program PLD devices (but not masked PLD devices) from Altera. Any
-other use of such megafunction design, netlist, support information,
-device programming or simulation file, or any other related documentation
-or information is prohibited for any other purpose, including, but not
-limited to modification, reverse engineering, de-compiling, or use with
-any other silicon devices, unless such use is explicitly licensed under
-a separate agreement with Altera or a megafunction partner. Title to the
-intellectual property, including patents, copyrights, trademarks, trade
-secrets, or maskworks, embodied in any such megafunction design, netlist,
-support information, device programming or simulation file, or any other
-related documentation or information provided by Altera or a megafunction
-partner, remains with Altera, the megafunction partner, or their respective
-licensors. No other licenses, including any licenses needed under any third
-party's intellectual property, are provided herein.
+Copyright (C) 1991-2006 Altera Corporation
+Your use of Altera Corporation's design tools, logic functions
+and other software and tools, and its AMPP partner logic
+functions, and any output files from any of the foregoing
+(including device programming or simulation files), and any
+associated documentation or information are expressly subject
+to the terms and conditions of the Altera Program License
+Subscription Agreement, Altera MegaCore Function License
+Agreement, or other applicable license agreement, including,
+without limitation, that your use is for the sole purpose of
+programming logic devices manufactured by Altera and sold by
+Altera or its authorized distributors. Please refer to the
+applicable agreement for further details.
*/
(header "symbol" (version "1.1"))
(symbol
- (rect 0 0 280 176)
- (text "pll1" (rect 140 0 163 16)(font "Arial" (font_size 10)))
+ (rect 0 0 248 176)
+ (text "pll1" (rect 114 0 137 16)(font "Arial" (font_size 10)))
(text "inst" (rect 8 160 25 172)(font "Arial" ))
(port
(pt 0 64)
@@ -51,55 +45,51 @@ party's intellectual property, are provided herein.
(line (pt 0 96)(pt 48 96)(line_width 1))
)
(port
- (pt 280 64)
+ (pt 248 64)
(output)
(text "c0" (rect 0 0 14 14)(font "Arial" (font_size 8)))
- (text "c0" (rect 265 51 276 64)(font "Arial" (font_size 8)))
- (line (pt 280 64)(pt 248 64)(line_width 1))
+ (text "c0" (rect 233 51 244 64)(font "Arial" (font_size 8)))
+ (line (pt 248 64)(pt 216 64)(line_width 1))
)
(port
- (pt 280 80)
+ (pt 248 80)
(output)
(text "c1" (rect 0 0 14 14)(font "Arial" (font_size 8)))
- (text "c1" (rect 265 67 276 80)(font "Arial" (font_size 8)))
- (line (pt 280 80)(pt 248 80)(line_width 1))
+ (text "c1" (rect 233 67 244 80)(font "Arial" (font_size 8)))
+ (line (pt 248 80)(pt 216 80)(line_width 1))
)
(drawing
- (text "Cyclone" (rect 237 161 272 173)(font "Arial" ))
+ (text "Cyclone" (rect 205 161 240 173)(font "Arial" ))
(text "inclk0 frequency: 75.000 MHz" (rect 58 59 183 71)(font "Arial" ))
(text "Operation Mode: Normal" (rect 58 73 159 85)(font "Arial" ))
(text "Clk " (rect 59 96 76 108)(font "Arial" ))
(text "Ratio" (rect 81 96 103 108)(font "Arial" ))
(text "Ph (dg)" (rect 108 96 138 108)(font "Arial" ))
- (text "Td (ns)" (rect 143 96 172 108)(font "Arial" ))
- (text "DC (%)" (rect 177 96 208 108)(font "Arial" ))
+ (text "DC (%)" (rect 143 96 174 108)(font "Arial" ))
(text "c0" (rect 62 111 72 123)(font "Arial" ))
- (text "4/1" (rect 86 111 99 123)(font "Arial" ))
+ (text "2/1" (rect 86 111 99 123)(font "Arial" ))
(text "0.00" (rect 114 111 132 123)(font "Arial" ))
- (text "0.00" (rect 148 111 166 123)(font "Arial" ))
- (text "50.00" (rect 181 111 204 123)(font "Arial" ))
+ (text "50.00" (rect 147 111 170 123)(font "Arial" ))
(text "c1" (rect 62 126 72 138)(font "Arial" ))
(text "1/4" (rect 86 126 99 138)(font "Arial" ))
(text "0.00" (rect 114 126 132 138)(font "Arial" ))
- (text "0.00" (rect 148 126 166 138)(font "Arial" ))
- (text "50.00" (rect 181 126 204 138)(font "Arial" ))
- (line (pt 0 0)(pt 281 0)(line_width 1))
- (line (pt 281 0)(pt 281 177)(line_width 1))
- (line (pt 0 177)(pt 281 177)(line_width 1))
+ (text "50.00" (rect 147 126 170 138)(font "Arial" ))
+ (line (pt 0 0)(pt 249 0)(line_width 1))
+ (line (pt 249 0)(pt 249 177)(line_width 1))
+ (line (pt 0 177)(pt 249 177)(line_width 1))
(line (pt 0 0)(pt 0 177)(line_width 1))
- (line (pt 56 94)(pt 210 94)(line_width 1))
- (line (pt 56 108)(pt 210 108)(line_width 1))
- (line (pt 56 123)(pt 210 123)(line_width 1))
- (line (pt 56 138)(pt 210 138)(line_width 1))
+ (line (pt 56 94)(pt 176 94)(line_width 1))
+ (line (pt 56 108)(pt 176 108)(line_width 1))
+ (line (pt 56 123)(pt 176 123)(line_width 1))
+ (line (pt 56 138)(pt 176 138)(line_width 1))
(line (pt 56 94)(pt 56 138)(line_width 1))
(line (pt 78 94)(pt 78 138)(line_width 3))
(line (pt 105 94)(pt 105 138)(line_width 3))
(line (pt 140 94)(pt 140 138)(line_width 3))
- (line (pt 174 94)(pt 174 138)(line_width 3))
- (line (pt 209 94)(pt 209 138)(line_width 1))
- (line (pt 48 48)(pt 248 48)(line_width 1))
- (line (pt 248 48)(pt 248 160)(line_width 1))
- (line (pt 48 160)(pt 248 160)(line_width 1))
+ (line (pt 175 94)(pt 175 138)(line_width 1))
+ (line (pt 48 48)(pt 216 48)(line_width 1))
+ (line (pt 216 48)(pt 216 160)(line_width 1))
+ (line (pt 48 160)(pt 216 160)(line_width 1))
(line (pt 48 48)(pt 48 160)(line_width 1))
)
)
diff --git a/pll1.v b/pll1.v
index eb3ec2b..8f21aaa 100644
--- a/pll1.v
+++ b/pll1.v
@@ -7,48 +7,45 @@
// File Name: pll1.v
// Megafunction Name(s):
// altpll
+//
+// Simulation Library Files(s):
+// altera_mf
// ============================================================
// ************************************************************
// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
//
-// 4.1 Build 207 08/26/2004 SP 1 SJ Web Edition
+// 6.1 Build 201 11/27/2006 SJ Web Edition
// ************************************************************
-//Copyright (C) 1991-2004 Altera Corporation
-//Any megafunction design, and related netlist (encrypted or decrypted),
-//support information, device programming or simulation file, and any other
-//associated documentation or information provided by Altera or a partner
-//under Altera's Megafunction Partnership Program may be used only
-//to program PLD devices (but not masked PLD devices) from Altera. Any
-//other use of such megafunction design, netlist, support information,
-//device programming or simulation file, or any other related documentation
-//or information is prohibited for any other purpose, including, but not
-//limited to modification, reverse engineering, de-compiling, or use with
-//any other silicon devices, unless such use is explicitly licensed under
-//a separate agreement with Altera or a megafunction partner. Title to the
-//intellectual property, including patents, copyrights, trademarks, trade
-//secrets, or maskworks, embodied in any such megafunction design, netlist,
-//support information, device programming or simulation file, or any other
-//related documentation or information provided by Altera or a megafunction
-//partner, remains with Altera, the megafunction partner, or their respective
-//licensors. No other licenses, including any licenses needed under any third
-//party's intellectual property, are provided herein.
+//Copyright (C) 1991-2006 Altera Corporation
+//Your use of Altera Corporation's design tools, logic functions
+//and other software and tools, and its AMPP partner logic
+//functions, and any output files from any of the foregoing
+//(including device programming or simulation files), and any
+//associated documentation or information are expressly subject
+//to the terms and conditions of the Altera Program License
+//Subscription Agreement, Altera MegaCore Function License
+//Agreement, or other applicable license agreement, including,
+//without limitation, that your use is for the sole purpose of
+//programming logic devices manufactured by Altera and sold by
+//Altera or its authorized distributors. Please refer to the
+//applicable agreement for further details.
// synopsys translate_off
`timescale 1 ps / 1 ps
// synopsys translate_on
module pll1 (
+ areset,
inclk0,
pllena,
- areset,
c0,
c1);
+ input areset;
input inclk0;
input pllena;
- input areset;
output c0;
output c1;
@@ -65,49 +62,91 @@ module pll1 (
.inclk (sub_wire4),
.pllena (pllena),
.areset (areset),
- .clk (sub_wire0)
- // synopsys translate_off
- ,
- .clkswitch (),
- .extclkena (),
- .scandataout (),
- .pfdena (),
- .locked (),
- .clkena (),
- .clkbad (),
+ .clk (sub_wire0),
.activeclock (),
- .scanclk (),
+ .clkbad (),
+ .clkena ({6{1'b1}}),
+ .clkloss (),
+ .clkswitch (1'b0),
+ .configupdate (1'b1),
.enable0 (),
.enable1 (),
.extclk (),
- .clkloss (),
- .scandata (),
- .scanread (),
+ .extclkena ({4{1'b1}}),
+ .fbin (1'b1),
+ .fbout (),
+ .locked (),
+ .pfdena (1'b1),
+ .phasecounterselect ({4{1'b1}}),
+ .phasedone (),
+ .phasestep (1'b1),
+ .phaseupdown (1'b1),
+ .scanaclr (1'b0),
+ .scanclk (1'b0),
+ .scanclkena (1'b1),
+ .scandata (1'b0),
+ .scandataout (),
.scandone (),
- .scanaclr (),
+ .scanread (1'b0),
+ .scanwrite (1'b0),
.sclkout0 (),
.sclkout1 (),
- .scanwrite (),
- .fbin ()
- // synopsys translate_on
- );
+ .vcooverrange (),
+ .vcounderrange ());
defparam
- altpll_component.clk1_divide_by = 4,
- altpll_component.clk1_phase_shift = "0",
- altpll_component.clk0_duty_cycle = 50,
- altpll_component.lpm_type = "altpll",
- altpll_component.clk0_multiply_by = 4,
- altpll_component.inclk0_input_frequency = 13333,
altpll_component.clk0_divide_by = 1,
+ altpll_component.clk0_duty_cycle = 50,
+ altpll_component.clk0_multiply_by = 2,
+ altpll_component.clk0_phase_shift = "0",
+ altpll_component.clk1_divide_by = 4,
altpll_component.clk1_duty_cycle = 50,
- altpll_component.pll_type = "AUTO",
altpll_component.clk1_multiply_by = 1,
- altpll_component.clk0_time_delay = "0",
+ altpll_component.clk1_phase_shift = "0",
+ altpll_component.compensate_clock = "CLK0",
+ altpll_component.inclk0_input_frequency = 13333,
altpll_component.intended_device_family = "Cyclone",
+ altpll_component.lpm_type = "altpll",
altpll_component.operation_mode = "NORMAL",
- altpll_component.compensate_clock = "CLK0",
- altpll_component.clk1_time_delay = "0",
- altpll_component.clk0_phase_shift = "0";
+ altpll_component.pll_type = "AUTO",
+ altpll_component.port_activeclock = "PORT_UNUSED",
+ altpll_component.port_areset = "PORT_USED",
+ altpll_component.port_clkbad0 = "PORT_UNUSED",
+ altpll_component.port_clkbad1 = "PORT_UNUSED",
+ altpll_component.port_clkloss = "PORT_UNUSED",
+ altpll_component.port_clkswitch = "PORT_UNUSED",
+ altpll_component.port_configupdate = "PORT_UNUSED",
+ altpll_component.port_fbin = "PORT_UNUSED",
+ altpll_component.port_inclk0 = "PORT_USED",
+ altpll_component.port_inclk1 = "PORT_UNUSED",
+ altpll_component.port_locked = "PORT_UNUSED",
+ altpll_component.port_pfdena = "PORT_UNUSED",
+ altpll_component.port_phasecounterselect = "PORT_UNUSED",
+ altpll_component.port_phasedone = "PORT_UNUSED",
+ altpll_component.port_phasestep = "PORT_UNUSED",
+ altpll_component.port_phaseupdown = "PORT_UNUSED",
+ altpll_component.port_pllena = "PORT_USED",
+ altpll_component.port_scanaclr = "PORT_UNUSED",
+ altpll_component.port_scanclk = "PORT_UNUSED",
+ altpll_component.port_scanclkena = "PORT_UNUSED",
+ altpll_component.port_scandata = "PORT_UNUSED",
+ altpll_component.port_scandataout = "PORT_UNUSED",
+ altpll_component.port_scandone = "PORT_UNUSED",
+ altpll_component.port_scanread = "PORT_UNUSED",
+ altpll_component.port_scanwrite = "PORT_UNUSED",
+ altpll_component.port_clk0 = "PORT_USED",
+ altpll_component.port_clk1 = "PORT_USED",
+ altpll_component.port_clk3 = "PORT_UNUSED",
+ altpll_component.port_clk4 = "PORT_UNUSED",
+ altpll_component.port_clk5 = "PORT_UNUSED",
+ altpll_component.port_clkena0 = "PORT_UNUSED",
+ altpll_component.port_clkena1 = "PORT_UNUSED",
+ altpll_component.port_clkena3 = "PORT_UNUSED",
+ altpll_component.port_clkena4 = "PORT_UNUSED",
+ altpll_component.port_clkena5 = "PORT_UNUSED",
+ altpll_component.port_extclk0 = "PORT_UNUSED",
+ altpll_component.port_extclk1 = "PORT_UNUSED",
+ altpll_component.port_extclk2 = "PORT_UNUSED",
+ altpll_component.port_extclk3 = "PORT_UNUSED";
endmodule
@@ -115,116 +154,156 @@ endmodule
// ============================================================
// CNX file retrieval info
// ============================================================
-// Retrieval info: PRIVATE: MIRROR_CLK0 STRING "0"
-// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING "deg"
-// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT0 STRING "MHz"
-// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_COMBO STRING "MHz"
-// Retrieval info: PRIVATE: SPREAD_USE STRING "0"
-// Retrieval info: PRIVATE: SPREAD_FEATURE_ENABLED STRING "0"
-// Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING "1"
-// Retrieval info: PRIVATE: GLOCK_COUNTER_EDIT NUMERIC "10000"
-// Retrieval info: PRIVATE: SRC_SYNCH_COMP_RADIO STRING "0"
-// Retrieval info: PRIVATE: MIRROR_CLK1 STRING "0"
-// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT1 STRING "deg"
-// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT1 STRING "MHz"
-// Retrieval info: PRIVATE: DUTY_CYCLE0 STRING "50.00000000"
-// Retrieval info: PRIVATE: PHASE_SHIFT0 STRING "0.00000000"
-// Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "4"
-// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING "0"
-// Retrieval info: PRIVATE: SPREAD_PERCENT STRING "0.500"
-// Retrieval info: PRIVATE: LOCKED_OUTPUT_CHECK STRING "0"
-// Retrieval info: PRIVATE: PLL_ARESET_CHECK STRING "1"
-// Retrieval info: PRIVATE: DUTY_CYCLE1 STRING "50.00000000"
-// Retrieval info: PRIVATE: PHASE_SHIFT1 STRING "0.00000000"
-// Retrieval info: PRIVATE: MULT_FACTOR1 NUMERIC "1"
-// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE1 STRING "0"
-// Retrieval info: PRIVATE: TIME_SHIFT0 STRING "0.00000000"
-// Retrieval info: PRIVATE: STICKY_CLK0 STRING "1"
+// Retrieval info: PRIVATE: ACTIVECLK_CHECK STRING "0"
// Retrieval info: PRIVATE: BANDWIDTH STRING "1.000"
-// Retrieval info: PRIVATE: BANDWIDTH_USE_CUSTOM STRING "0"
-// Retrieval info: PRIVATE: DEVICE_SPEED_GRADE STRING "Any"
-// Retrieval info: PRIVATE: TIME_SHIFT1 STRING "0.00000000"
-// Retrieval info: PRIVATE: STICKY_CLK1 STRING "1"
-// Retrieval info: PRIVATE: SPREAD_FREQ STRING "300.000"
// Retrieval info: PRIVATE: BANDWIDTH_FEATURE_ENABLED STRING "0"
-// Retrieval info: PRIVATE: LONG_SCAN_RADIO STRING "1"
-// Retrieval info: PRIVATE: PLL_ENHPLL_CHECK NUMERIC "0"
-// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE_DIRTY NUMERIC "0"
-// Retrieval info: PRIVATE: USE_CLK0 STRING "1"
-// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT_CHANGED STRING "1"
-// Retrieval info: PRIVATE: SCAN_FEATURE_ENABLED STRING "0"
-// Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING "0"
-// Retrieval info: PRIVATE: PLL_PFDENA_CHECK STRING "0"
-// Retrieval info: PRIVATE: USE_CLK1 STRING "1"
+// Retrieval info: PRIVATE: BANDWIDTH_FREQ_UNIT STRING "MHz"
+// Retrieval info: PRIVATE: BANDWIDTH_PRESET STRING "Low"
+// Retrieval info: PRIVATE: BANDWIDTH_USE_AUTO STRING "1"
+// Retrieval info: PRIVATE: BANDWIDTH_USE_CUSTOM STRING "0"
+// Retrieval info: PRIVATE: BANDWIDTH_USE_PRESET STRING "0"
+// Retrieval info: PRIVATE: CLKBAD_SWITCHOVER_CHECK STRING "0"
+// Retrieval info: PRIVATE: CLKLOSS_CHECK STRING "0"
+// Retrieval info: PRIVATE: CLKSWITCH_CHECK STRING "0"
+// Retrieval info: PRIVATE: CNX_NO_COMPENSATE_RADIO STRING "0"
// Retrieval info: PRIVATE: CREATE_CLKBAD_CHECK STRING "0"
-// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT STRING "50.000"
+// Retrieval info: PRIVATE: CREATE_INCLK1_CHECK STRING "0"
// Retrieval info: PRIVATE: CUR_DEDICATED_CLK STRING "c0"
-// Retrieval info: PRIVATE: PLL_FASTPLL_CHECK NUMERIC "0"
-// Retrieval info: PRIVATE: ACTIVECLK_CHECK STRING "0"
-// Retrieval info: PRIVATE: BANDWIDTH_FREQ_UNIT STRING "MHz"
-// Retrieval info: PRIVATE: INCLK0_FREQ_UNIT_COMBO STRING "MHz"
-// Retrieval info: PRIVATE: GLOCKED_MODE_CHECK STRING "0"
-// Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING "1"
// Retrieval info: PRIVATE: CUR_FBIN_CLK STRING "e0"
+// Retrieval info: PRIVATE: DEVICE_FAMILY NUMERIC "11"
+// Retrieval info: PRIVATE: DEVICE_SPEED_GRADE STRING "Any"
+// Retrieval info: PRIVATE: DEV_FAMILY STRING "Cyclone"
// Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC "1"
-// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_CHANGED STRING "1"
-// Retrieval info: PRIVATE: HAS_MANUAL_SWITCHOVER STRING "1"
-// Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING "0"
-// Retrieval info: PRIVATE: PLL_AUTOPLL_CHECK NUMERIC "1"
// Retrieval info: PRIVATE: DIV_FACTOR1 NUMERIC "4"
-// Retrieval info: PRIVATE: CLKLOSS_CHECK STRING "0"
-// Retrieval info: PRIVATE: BANDWIDTH_USE_AUTO STRING "1"
-// Retrieval info: PRIVATE: SHORT_SCAN_RADIO STRING "0"
-// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE STRING "525.000"
-// Retrieval info: PRIVATE: CLKSWITCH_CHECK STRING "0"
-// Retrieval info: PRIVATE: SPREAD_FREQ_UNIT STRING "KHz"
-// Retrieval info: PRIVATE: PLL_ENA_CHECK STRING "1"
+// Retrieval info: PRIVATE: DUTY_CYCLE0 STRING "50.00000000"
+// Retrieval info: PRIVATE: DUTY_CYCLE1 STRING "50.00000000"
+// Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING "0"
+// Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING "1"
+// Retrieval info: PRIVATE: GLOCKED_FEATURE_ENABLED STRING "0"
+// Retrieval info: PRIVATE: GLOCKED_MODE_CHECK STRING "0"
+// Retrieval info: PRIVATE: GLOCK_COUNTER_EDIT NUMERIC "10000"
+// Retrieval info: PRIVATE: HAS_MANUAL_SWITCHOVER STRING "1"
// Retrieval info: PRIVATE: INCLK0_FREQ_EDIT STRING "75.000"
-// Retrieval info: PRIVATE: CNX_NO_COMPENSATE_RADIO STRING "0"
+// Retrieval info: PRIVATE: INCLK0_FREQ_UNIT_COMBO STRING "MHz"
+// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT STRING "50.000"
+// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT_CHANGED STRING "1"
+// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_CHANGED STRING "1"
+// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_COMBO STRING "MHz"
// Retrieval info: PRIVATE: INT_FEEDBACK__MODE_RADIO STRING "1"
-// Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "100.000"
+// Retrieval info: PRIVATE: LOCKED_OUTPUT_CHECK STRING "0"
+// Retrieval info: PRIVATE: LOCK_LOSS_SWITCHOVER_CHECK STRING "0"
+// Retrieval info: PRIVATE: LONG_SCAN_RADIO STRING "1"
+// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE STRING "525.000"
+// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE_DIRTY NUMERIC "0"
+// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING "ps"
+// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT1 STRING "ps"
+// Retrieval info: PRIVATE: MIRROR_CLK0 STRING "0"
+// Retrieval info: PRIVATE: MIRROR_CLK1 STRING "0"
+// Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "2"
+// Retrieval info: PRIVATE: MULT_FACTOR1 NUMERIC "1"
+// Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING "1"
+// Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "100.00000000"
+// Retrieval info: PRIVATE: OUTPUT_FREQ1 STRING "100.00000000"
+// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING "0"
+// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE1 STRING "0"
+// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT0 STRING "MHz"
+// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT1 STRING "MHz"
+// Retrieval info: PRIVATE: PHASE_RECONFIG_FEATURE_ENABLED STRING "0"
+// Retrieval info: PRIVATE: PHASE_RECONFIG_INPUTS_CHECK STRING "0"
+// Retrieval info: PRIVATE: PHASE_SHIFT0 STRING "0.00000000"
+// Retrieval info: PRIVATE: PHASE_SHIFT1 STRING "0.00000000"
+// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING "deg"
+// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT1 STRING "deg"
+// Retrieval info: PRIVATE: PLL_ADVANCED_PARAM_CHECK STRING "0"
+// Retrieval info: PRIVATE: PLL_ARESET_CHECK STRING "1"
+// Retrieval info: PRIVATE: PLL_AUTOPLL_CHECK NUMERIC "1"
+// Retrieval info: PRIVATE: PLL_ENA_CHECK STRING "1"
+// Retrieval info: PRIVATE: PLL_ENHPLL_CHECK NUMERIC "0"
+// Retrieval info: PRIVATE: PLL_FASTPLL_CHECK NUMERIC "0"
+// Retrieval info: PRIVATE: PLL_LVDS_PLL_CHECK NUMERIC "0"
+// Retrieval info: PRIVATE: PLL_PFDENA_CHECK STRING "0"
+// Retrieval info: PRIVATE: PLL_TARGET_HARCOPY_CHECK NUMERIC "0"
// Retrieval info: PRIVATE: PRIMARY_CLK_COMBO STRING "inclk0"
-// Retrieval info: PRIVATE: CREATE_INCLK1_CHECK STRING "0"
// Retrieval info: PRIVATE: SACN_INPUTS_CHECK STRING "0"
-// Retrieval info: PRIVATE: DEV_FAMILY STRING "Cyclone"
-// Retrieval info: PRIVATE: OUTPUT_FREQ1 STRING "100.000"
-// Retrieval info: PRIVATE: LOCK_LOSS_SWITCHOVER_CHECK STRING "0"
+// Retrieval info: PRIVATE: SCAN_FEATURE_ENABLED STRING "0"
+// Retrieval info: PRIVATE: SELF_RESET_LOCK_LOSS STRING "0"
+// Retrieval info: PRIVATE: SHORT_SCAN_RADIO STRING "0"
+// Retrieval info: PRIVATE: SPREAD_FEATURE_ENABLED STRING "0"
+// Retrieval info: PRIVATE: SPREAD_FREQ STRING "300.000"
+// Retrieval info: PRIVATE: SPREAD_FREQ_UNIT STRING "KHz"
+// Retrieval info: PRIVATE: SPREAD_PERCENT STRING "0.500"
+// Retrieval info: PRIVATE: SPREAD_USE STRING "0"
+// Retrieval info: PRIVATE: SRC_SYNCH_COMP_RADIO STRING "0"
+// Retrieval info: PRIVATE: STICKY_CLK0 STRING "1"
+// Retrieval info: PRIVATE: STICKY_CLK1 STRING "1"
// Retrieval info: PRIVATE: SWITCHOVER_COUNT_EDIT NUMERIC "1"
// Retrieval info: PRIVATE: SWITCHOVER_FEATURE_ENABLED STRING "0"
-// Retrieval info: PRIVATE: BANDWIDTH_PRESET STRING "Low"
-// Retrieval info: PRIVATE: GLOCKED_FEATURE_ENABLED STRING "0"
+// Retrieval info: PRIVATE: USE_CLK0 STRING "1"
+// Retrieval info: PRIVATE: USE_CLK1 STRING "1"
// Retrieval info: PRIVATE: USE_CLKENA0 STRING "0"
-// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING "ps"
// Retrieval info: PRIVATE: USE_CLKENA1 STRING "0"
-// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT1 STRING "ps"
-// Retrieval info: PRIVATE: CLKBAD_SWITCHOVER_CHECK STRING "0"
-// Retrieval info: PRIVATE: BANDWIDTH_USE_PRESET STRING "0"
-// Retrieval info: PRIVATE: PLL_LVDS_PLL_CHECK NUMERIC "0"
-// Retrieval info: PRIVATE: DEVICE_FAMILY NUMERIC "11"
+// Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING "0"
// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
-// Retrieval info: CONSTANT: CLK1_DIVIDE_BY NUMERIC "4"
-// Retrieval info: CONSTANT: CLK1_PHASE_SHIFT STRING "0"
-// Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC "50"
-// Retrieval info: CONSTANT: LPM_TYPE STRING "altpll"
-// Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "4"
-// Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC "13333"
// Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "1"
+// Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC "50"
+// Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "2"
+// Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING "0"
+// Retrieval info: CONSTANT: CLK1_DIVIDE_BY NUMERIC "4"
// Retrieval info: CONSTANT: CLK1_DUTY_CYCLE NUMERIC "50"
-// Retrieval info: CONSTANT: PLL_TYPE STRING "AUTO"
// Retrieval info: CONSTANT: CLK1_MULTIPLY_BY NUMERIC "1"
-// Retrieval info: CONSTANT: CLK0_TIME_DELAY STRING "0"
+// Retrieval info: CONSTANT: CLK1_PHASE_SHIFT STRING "0"
+// Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING "CLK0"
+// Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC "13333"
// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone"
+// Retrieval info: CONSTANT: LPM_TYPE STRING "altpll"
// Retrieval info: CONSTANT: OPERATION_MODE STRING "NORMAL"
-// Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING "CLK0"
-// Retrieval info: CONSTANT: CLK1_TIME_DELAY STRING "0"
-// Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING "0"
-// Retrieval info: USED_PORT: c0 0 0 0 0 OUTPUT VCC "c0"
-// Retrieval info: USED_PORT: @clk 0 0 6 0 OUTPUT VCC "@clk[5..0]"
-// Retrieval info: USED_PORT: c1 0 0 0 0 OUTPUT VCC "c1"
-// Retrieval info: USED_PORT: inclk0 0 0 0 0 INPUT GND "inclk0"
-// Retrieval info: USED_PORT: pllena 0 0 0 0 INPUT VCC "pllena"
-// Retrieval info: USED_PORT: @extclk 0 0 4 0 OUTPUT VCC "@extclk[3..0]"
+// Retrieval info: CONSTANT: PLL_TYPE STRING "AUTO"
+// Retrieval info: CONSTANT: PORT_ACTIVECLOCK STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_ARESET STRING "PORT_USED"
+// Retrieval info: CONSTANT: PORT_CLKBAD0 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_CLKBAD1 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_CLKLOSS STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_CLKSWITCH STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_CONFIGUPDATE STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_FBIN STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_INCLK0 STRING "PORT_USED"
+// Retrieval info: CONSTANT: PORT_INCLK1 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_LOCKED STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PFDENA STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PHASECOUNTERSELECT STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PHASEDONE STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PHASESTEP STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PHASEUPDOWN STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PLLENA STRING "PORT_USED"
+// Retrieval info: CONSTANT: PORT_SCANACLR STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANCLK STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANCLKENA STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANDATA STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANDATAOUT STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANDONE STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANREAD STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANWRITE STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clk0 STRING "PORT_USED"
+// Retrieval info: CONSTANT: PORT_clk1 STRING "PORT_USED"
+// Retrieval info: CONSTANT: PORT_clk3 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clk4 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clk5 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena0 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena1 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena3 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena4 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena5 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_extclk0 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_extclk1 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_extclk2 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_extclk3 STRING "PORT_UNUSED"
+// Retrieval info: USED_PORT: @clk 0 0 6 0 OUTPUT_CLK_EXT VCC "@clk[5..0]"
+// Retrieval info: USED_PORT: @extclk 0 0 4 0 OUTPUT_CLK_EXT VCC "@extclk[3..0]"
// Retrieval info: USED_PORT: areset 0 0 0 0 INPUT GND "areset"
+// Retrieval info: USED_PORT: c0 0 0 0 0 OUTPUT_CLK_EXT VCC "c0"
+// Retrieval info: USED_PORT: c1 0 0 0 0 OUTPUT_CLK_EXT VCC "c1"
+// Retrieval info: USED_PORT: inclk0 0 0 0 0 INPUT_CLK_EXT GND "inclk0"
+// Retrieval info: USED_PORT: pllena 0 0 0 0 INPUT VCC "pllena"
// Retrieval info: CONNECT: @inclk 0 0 1 0 inclk0 0 0 0 0
// Retrieval info: CONNECT: c0 0 0 0 0 @clk 0 0 1 0
// Retrieval info: CONNECT: c1 0 0 0 0 @clk 0 0 1 1
@@ -237,3 +316,7 @@ endmodule
// Retrieval info: GEN_FILE: TYPE_NORMAL pll1.bsf TRUE FALSE
// Retrieval info: GEN_FILE: TYPE_NORMAL pll1_inst.v FALSE FALSE
// Retrieval info: GEN_FILE: TYPE_NORMAL pll1_bb.v TRUE FALSE
+// Retrieval info: GEN_FILE: TYPE_NORMAL pll1.ppf TRUE FALSE
+// Retrieval info: GEN_FILE: TYPE_NORMAL pll1_waveforms.html TRUE FALSE
+// Retrieval info: GEN_FILE: TYPE_NORMAL pll1_wave*.jpg FALSE FALSE
+// Retrieval info: LIB_FILE: altera_mf
diff --git a/pll1_bb.v b/pll1_bb.v
index 650e8d0..2ab467a 100644
--- a/pll1_bb.v
+++ b/pll1_bb.v
@@ -7,43 +7,40 @@
// File Name: pll1.v
// Megafunction Name(s):
// altpll
+//
+// Simulation Library Files(s):
+// altera_mf
// ============================================================
// ************************************************************
// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
//
-// 4.1 Build 207 08/26/2004 SP 1 SJ Web Edition
+// 6.1 Build 201 11/27/2006 SJ Web Edition
// ************************************************************
-//Copyright (C) 1991-2004 Altera Corporation
-//Any megafunction design, and related netlist (encrypted or decrypted),
-//support information, device programming or simulation file, and any other
-//associated documentation or information provided by Altera or a partner
-//under Altera's Megafunction Partnership Program may be used only
-//to program PLD devices (but not masked PLD devices) from Altera. Any
-//other use of such megafunction design, netlist, support information,
-//device programming or simulation file, or any other related documentation
-//or information is prohibited for any other purpose, including, but not
-//limited to modification, reverse engineering, de-compiling, or use with
-//any other silicon devices, unless such use is explicitly licensed under
-//a separate agreement with Altera or a megafunction partner. Title to the
-//intellectual property, including patents, copyrights, trademarks, trade
-//secrets, or maskworks, embodied in any such megafunction design, netlist,
-//support information, device programming or simulation file, or any other
-//related documentation or information provided by Altera or a megafunction
-//partner, remains with Altera, the megafunction partner, or their respective
-//licensors. No other licenses, including any licenses needed under any third
-//party's intellectual property, are provided herein.
+//Copyright (C) 1991-2006 Altera Corporation
+//Your use of Altera Corporation's design tools, logic functions
+//and other software and tools, and its AMPP partner logic
+//functions, and any output files from any of the foregoing
+//(including device programming or simulation files), and any
+//associated documentation or information are expressly subject
+//to the terms and conditions of the Altera Program License
+//Subscription Agreement, Altera MegaCore Function License
+//Agreement, or other applicable license agreement, including,
+//without limitation, that your use is for the sole purpose of
+//programming logic devices manufactured by Altera and sold by
+//Altera or its authorized distributors. Please refer to the
+//applicable agreement for further details.
module pll1 (
+ areset,
inclk0,
pllena,
- areset,
c0,
c1);
+ input areset;
input inclk0;
input pllena;
- input areset;
output c0;
output c1;
@@ -52,116 +49,156 @@ endmodule
// ============================================================
// CNX file retrieval info
// ============================================================
-// Retrieval info: PRIVATE: MIRROR_CLK0 STRING "0"
-// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING "deg"
-// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT0 STRING "MHz"
-// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_COMBO STRING "MHz"
-// Retrieval info: PRIVATE: SPREAD_USE STRING "0"
-// Retrieval info: PRIVATE: SPREAD_FEATURE_ENABLED STRING "0"
-// Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING "1"
-// Retrieval info: PRIVATE: GLOCK_COUNTER_EDIT NUMERIC "10000"
-// Retrieval info: PRIVATE: SRC_SYNCH_COMP_RADIO STRING "0"
-// Retrieval info: PRIVATE: MIRROR_CLK1 STRING "0"
-// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT1 STRING "deg"
-// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT1 STRING "MHz"
-// Retrieval info: PRIVATE: DUTY_CYCLE0 STRING "50.00000000"
-// Retrieval info: PRIVATE: PHASE_SHIFT0 STRING "0.00000000"
-// Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "4"
-// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING "0"
-// Retrieval info: PRIVATE: SPREAD_PERCENT STRING "0.500"
-// Retrieval info: PRIVATE: LOCKED_OUTPUT_CHECK STRING "0"
-// Retrieval info: PRIVATE: PLL_ARESET_CHECK STRING "1"
-// Retrieval info: PRIVATE: DUTY_CYCLE1 STRING "50.00000000"
-// Retrieval info: PRIVATE: PHASE_SHIFT1 STRING "0.00000000"
-// Retrieval info: PRIVATE: MULT_FACTOR1 NUMERIC "1"
-// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE1 STRING "0"
-// Retrieval info: PRIVATE: TIME_SHIFT0 STRING "0.00000000"
-// Retrieval info: PRIVATE: STICKY_CLK0 STRING "1"
+// Retrieval info: PRIVATE: ACTIVECLK_CHECK STRING "0"
// Retrieval info: PRIVATE: BANDWIDTH STRING "1.000"
-// Retrieval info: PRIVATE: BANDWIDTH_USE_CUSTOM STRING "0"
-// Retrieval info: PRIVATE: DEVICE_SPEED_GRADE STRING "Any"
-// Retrieval info: PRIVATE: TIME_SHIFT1 STRING "0.00000000"
-// Retrieval info: PRIVATE: STICKY_CLK1 STRING "1"
-// Retrieval info: PRIVATE: SPREAD_FREQ STRING "300.000"
// Retrieval info: PRIVATE: BANDWIDTH_FEATURE_ENABLED STRING "0"
-// Retrieval info: PRIVATE: LONG_SCAN_RADIO STRING "1"
-// Retrieval info: PRIVATE: PLL_ENHPLL_CHECK NUMERIC "0"
-// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE_DIRTY NUMERIC "0"
-// Retrieval info: PRIVATE: USE_CLK0 STRING "1"
-// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT_CHANGED STRING "1"
-// Retrieval info: PRIVATE: SCAN_FEATURE_ENABLED STRING "0"
-// Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING "0"
-// Retrieval info: PRIVATE: PLL_PFDENA_CHECK STRING "0"
-// Retrieval info: PRIVATE: USE_CLK1 STRING "1"
+// Retrieval info: PRIVATE: BANDWIDTH_FREQ_UNIT STRING "MHz"
+// Retrieval info: PRIVATE: BANDWIDTH_PRESET STRING "Low"
+// Retrieval info: PRIVATE: BANDWIDTH_USE_AUTO STRING "1"
+// Retrieval info: PRIVATE: BANDWIDTH_USE_CUSTOM STRING "0"
+// Retrieval info: PRIVATE: BANDWIDTH_USE_PRESET STRING "0"
+// Retrieval info: PRIVATE: CLKBAD_SWITCHOVER_CHECK STRING "0"
+// Retrieval info: PRIVATE: CLKLOSS_CHECK STRING "0"
+// Retrieval info: PRIVATE: CLKSWITCH_CHECK STRING "0"
+// Retrieval info: PRIVATE: CNX_NO_COMPENSATE_RADIO STRING "0"
// Retrieval info: PRIVATE: CREATE_CLKBAD_CHECK STRING "0"
-// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT STRING "50.000"
+// Retrieval info: PRIVATE: CREATE_INCLK1_CHECK STRING "0"
// Retrieval info: PRIVATE: CUR_DEDICATED_CLK STRING "c0"
-// Retrieval info: PRIVATE: PLL_FASTPLL_CHECK NUMERIC "0"
-// Retrieval info: PRIVATE: ACTIVECLK_CHECK STRING "0"
-// Retrieval info: PRIVATE: BANDWIDTH_FREQ_UNIT STRING "MHz"
-// Retrieval info: PRIVATE: INCLK0_FREQ_UNIT_COMBO STRING "MHz"
-// Retrieval info: PRIVATE: GLOCKED_MODE_CHECK STRING "0"
-// Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING "1"
// Retrieval info: PRIVATE: CUR_FBIN_CLK STRING "e0"
+// Retrieval info: PRIVATE: DEVICE_FAMILY NUMERIC "11"
+// Retrieval info: PRIVATE: DEVICE_SPEED_GRADE STRING "Any"
+// Retrieval info: PRIVATE: DEV_FAMILY STRING "Cyclone"
// Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC "1"
-// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_CHANGED STRING "1"
-// Retrieval info: PRIVATE: HAS_MANUAL_SWITCHOVER STRING "1"
-// Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING "0"
-// Retrieval info: PRIVATE: PLL_AUTOPLL_CHECK NUMERIC "1"
// Retrieval info: PRIVATE: DIV_FACTOR1 NUMERIC "4"
-// Retrieval info: PRIVATE: CLKLOSS_CHECK STRING "0"
-// Retrieval info: PRIVATE: BANDWIDTH_USE_AUTO STRING "1"
-// Retrieval info: PRIVATE: SHORT_SCAN_RADIO STRING "0"
-// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE STRING "525.000"
-// Retrieval info: PRIVATE: CLKSWITCH_CHECK STRING "0"
-// Retrieval info: PRIVATE: SPREAD_FREQ_UNIT STRING "KHz"
-// Retrieval info: PRIVATE: PLL_ENA_CHECK STRING "1"
+// Retrieval info: PRIVATE: DUTY_CYCLE0 STRING "50.00000000"
+// Retrieval info: PRIVATE: DUTY_CYCLE1 STRING "50.00000000"
+// Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING "0"
+// Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING "1"
+// Retrieval info: PRIVATE: GLOCKED_FEATURE_ENABLED STRING "0"
+// Retrieval info: PRIVATE: GLOCKED_MODE_CHECK STRING "0"
+// Retrieval info: PRIVATE: GLOCK_COUNTER_EDIT NUMERIC "10000"
+// Retrieval info: PRIVATE: HAS_MANUAL_SWITCHOVER STRING "1"
// Retrieval info: PRIVATE: INCLK0_FREQ_EDIT STRING "75.000"
-// Retrieval info: PRIVATE: CNX_NO_COMPENSATE_RADIO STRING "0"
+// Retrieval info: PRIVATE: INCLK0_FREQ_UNIT_COMBO STRING "MHz"
+// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT STRING "50.000"
+// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT_CHANGED STRING "1"
+// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_CHANGED STRING "1"
+// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_COMBO STRING "MHz"
// Retrieval info: PRIVATE: INT_FEEDBACK__MODE_RADIO STRING "1"
-// Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "100.000"
+// Retrieval info: PRIVATE: LOCKED_OUTPUT_CHECK STRING "0"
+// Retrieval info: PRIVATE: LOCK_LOSS_SWITCHOVER_CHECK STRING "0"
+// Retrieval info: PRIVATE: LONG_SCAN_RADIO STRING "1"
+// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE STRING "525.000"
+// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE_DIRTY NUMERIC "0"
+// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING "ps"
+// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT1 STRING "ps"
+// Retrieval info: PRIVATE: MIRROR_CLK0 STRING "0"
+// Retrieval info: PRIVATE: MIRROR_CLK1 STRING "0"
+// Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "2"
+// Retrieval info: PRIVATE: MULT_FACTOR1 NUMERIC "1"
+// Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING "1"
+// Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "100.00000000"
+// Retrieval info: PRIVATE: OUTPUT_FREQ1 STRING "100.00000000"
+// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING "0"
+// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE1 STRING "0"
+// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT0 STRING "MHz"
+// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT1 STRING "MHz"
+// Retrieval info: PRIVATE: PHASE_RECONFIG_FEATURE_ENABLED STRING "0"
+// Retrieval info: PRIVATE: PHASE_RECONFIG_INPUTS_CHECK STRING "0"
+// Retrieval info: PRIVATE: PHASE_SHIFT0 STRING "0.00000000"
+// Retrieval info: PRIVATE: PHASE_SHIFT1 STRING "0.00000000"
+// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING "deg"
+// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT1 STRING "deg"
+// Retrieval info: PRIVATE: PLL_ADVANCED_PARAM_CHECK STRING "0"
+// Retrieval info: PRIVATE: PLL_ARESET_CHECK STRING "1"
+// Retrieval info: PRIVATE: PLL_AUTOPLL_CHECK NUMERIC "1"
+// Retrieval info: PRIVATE: PLL_ENA_CHECK STRING "1"
+// Retrieval info: PRIVATE: PLL_ENHPLL_CHECK NUMERIC "0"
+// Retrieval info: PRIVATE: PLL_FASTPLL_CHECK NUMERIC "0"
+// Retrieval info: PRIVATE: PLL_LVDS_PLL_CHECK NUMERIC "0"
+// Retrieval info: PRIVATE: PLL_PFDENA_CHECK STRING "0"
+// Retrieval info: PRIVATE: PLL_TARGET_HARCOPY_CHECK NUMERIC "0"
// Retrieval info: PRIVATE: PRIMARY_CLK_COMBO STRING "inclk0"
-// Retrieval info: PRIVATE: CREATE_INCLK1_CHECK STRING "0"
// Retrieval info: PRIVATE: SACN_INPUTS_CHECK STRING "0"
-// Retrieval info: PRIVATE: DEV_FAMILY STRING "Cyclone"
-// Retrieval info: PRIVATE: OUTPUT_FREQ1 STRING "100.000"
-// Retrieval info: PRIVATE: LOCK_LOSS_SWITCHOVER_CHECK STRING "0"
+// Retrieval info: PRIVATE: SCAN_FEATURE_ENABLED STRING "0"
+// Retrieval info: PRIVATE: SELF_RESET_LOCK_LOSS STRING "0"
+// Retrieval info: PRIVATE: SHORT_SCAN_RADIO STRING "0"
+// Retrieval info: PRIVATE: SPREAD_FEATURE_ENABLED STRING "0"
+// Retrieval info: PRIVATE: SPREAD_FREQ STRING "300.000"
+// Retrieval info: PRIVATE: SPREAD_FREQ_UNIT STRING "KHz"
+// Retrieval info: PRIVATE: SPREAD_PERCENT STRING "0.500"
+// Retrieval info: PRIVATE: SPREAD_USE STRING "0"
+// Retrieval info: PRIVATE: SRC_SYNCH_COMP_RADIO STRING "0"
+// Retrieval info: PRIVATE: STICKY_CLK0 STRING "1"
+// Retrieval info: PRIVATE: STICKY_CLK1 STRING "1"
// Retrieval info: PRIVATE: SWITCHOVER_COUNT_EDIT NUMERIC "1"
// Retrieval info: PRIVATE: SWITCHOVER_FEATURE_ENABLED STRING "0"
-// Retrieval info: PRIVATE: BANDWIDTH_PRESET STRING "Low"
-// Retrieval info: PRIVATE: GLOCKED_FEATURE_ENABLED STRING "0"
+// Retrieval info: PRIVATE: USE_CLK0 STRING "1"
+// Retrieval info: PRIVATE: USE_CLK1 STRING "1"
// Retrieval info: PRIVATE: USE_CLKENA0 STRING "0"
-// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING "ps"
// Retrieval info: PRIVATE: USE_CLKENA1 STRING "0"
-// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT1 STRING "ps"
-// Retrieval info: PRIVATE: CLKBAD_SWITCHOVER_CHECK STRING "0"
-// Retrieval info: PRIVATE: BANDWIDTH_USE_PRESET STRING "0"
-// Retrieval info: PRIVATE: PLL_LVDS_PLL_CHECK NUMERIC "0"
-// Retrieval info: PRIVATE: DEVICE_FAMILY NUMERIC "11"
+// Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING "0"
// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
-// Retrieval info: CONSTANT: CLK1_DIVIDE_BY NUMERIC "4"
-// Retrieval info: CONSTANT: CLK1_PHASE_SHIFT STRING "0"
-// Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC "50"
-// Retrieval info: CONSTANT: LPM_TYPE STRING "altpll"
-// Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "4"
-// Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC "13333"
// Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "1"
+// Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC "50"
+// Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "2"
+// Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING "0"
+// Retrieval info: CONSTANT: CLK1_DIVIDE_BY NUMERIC "4"
// Retrieval info: CONSTANT: CLK1_DUTY_CYCLE NUMERIC "50"
-// Retrieval info: CONSTANT: PLL_TYPE STRING "AUTO"
// Retrieval info: CONSTANT: CLK1_MULTIPLY_BY NUMERIC "1"
-// Retrieval info: CONSTANT: CLK0_TIME_DELAY STRING "0"
+// Retrieval info: CONSTANT: CLK1_PHASE_SHIFT STRING "0"
+// Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING "CLK0"
+// Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC "13333"
// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone"
+// Retrieval info: CONSTANT: LPM_TYPE STRING "altpll"
// Retrieval info: CONSTANT: OPERATION_MODE STRING "NORMAL"
-// Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING "CLK0"
-// Retrieval info: CONSTANT: CLK1_TIME_DELAY STRING "0"
-// Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING "0"
-// Retrieval info: USED_PORT: c0 0 0 0 0 OUTPUT VCC "c0"
-// Retrieval info: USED_PORT: @clk 0 0 6 0 OUTPUT VCC "@clk[5..0]"
-// Retrieval info: USED_PORT: c1 0 0 0 0 OUTPUT VCC "c1"
-// Retrieval info: USED_PORT: inclk0 0 0 0 0 INPUT GND "inclk0"
-// Retrieval info: USED_PORT: pllena 0 0 0 0 INPUT VCC "pllena"
-// Retrieval info: USED_PORT: @extclk 0 0 4 0 OUTPUT VCC "@extclk[3..0]"
+// Retrieval info: CONSTANT: PLL_TYPE STRING "AUTO"
+// Retrieval info: CONSTANT: PORT_ACTIVECLOCK STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_ARESET STRING "PORT_USED"
+// Retrieval info: CONSTANT: PORT_CLKBAD0 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_CLKBAD1 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_CLKLOSS STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_CLKSWITCH STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_CONFIGUPDATE STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_FBIN STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_INCLK0 STRING "PORT_USED"
+// Retrieval info: CONSTANT: PORT_INCLK1 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_LOCKED STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PFDENA STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PHASECOUNTERSELECT STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PHASEDONE STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PHASESTEP STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PHASEUPDOWN STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PLLENA STRING "PORT_USED"
+// Retrieval info: CONSTANT: PORT_SCANACLR STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANCLK STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANCLKENA STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANDATA STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANDATAOUT STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANDONE STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANREAD STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANWRITE STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clk0 STRING "PORT_USED"
+// Retrieval info: CONSTANT: PORT_clk1 STRING "PORT_USED"
+// Retrieval info: CONSTANT: PORT_clk3 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clk4 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clk5 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena0 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena1 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena3 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena4 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena5 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_extclk0 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_extclk1 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_extclk2 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_extclk3 STRING "PORT_UNUSED"
+// Retrieval info: USED_PORT: @clk 0 0 6 0 OUTPUT_CLK_EXT VCC "@clk[5..0]"
+// Retrieval info: USED_PORT: @extclk 0 0 4 0 OUTPUT_CLK_EXT VCC "@extclk[3..0]"
// Retrieval info: USED_PORT: areset 0 0 0 0 INPUT GND "areset"
+// Retrieval info: USED_PORT: c0 0 0 0 0 OUTPUT_CLK_EXT VCC "c0"
+// Retrieval info: USED_PORT: c1 0 0 0 0 OUTPUT_CLK_EXT VCC "c1"
+// Retrieval info: USED_PORT: inclk0 0 0 0 0 INPUT_CLK_EXT GND "inclk0"
+// Retrieval info: USED_PORT: pllena 0 0 0 0 INPUT VCC "pllena"
// Retrieval info: CONNECT: @inclk 0 0 1 0 inclk0 0 0 0 0
// Retrieval info: CONNECT: c0 0 0 0 0 @clk 0 0 1 0
// Retrieval info: CONNECT: c1 0 0 0 0 @clk 0 0 1 1
@@ -174,3 +211,7 @@ endmodule
// Retrieval info: GEN_FILE: TYPE_NORMAL pll1.bsf TRUE FALSE
// Retrieval info: GEN_FILE: TYPE_NORMAL pll1_inst.v FALSE FALSE
// Retrieval info: GEN_FILE: TYPE_NORMAL pll1_bb.v TRUE FALSE
+// Retrieval info: GEN_FILE: TYPE_NORMAL pll1.ppf TRUE FALSE
+// Retrieval info: GEN_FILE: TYPE_NORMAL pll1_waveforms.html TRUE FALSE
+// Retrieval info: GEN_FILE: TYPE_NORMAL pll1_wave*.jpg FALSE FALSE
+// Retrieval info: LIB_FILE: altera_mf
diff --git a/sound.v b/sound.v
index 26ab133..7aace0b 100644
--- a/sound.v
+++ b/sound.v
@@ -4,9 +4,13 @@
* Circuit to generate PDM sound using an Altera Nios board with an
* AleaRep Lancelot sound add-on.
*
- * This module should be fed with a 200 MHz clock from the PLL.
+ * This module should be fed with a 100 MHz clock from the PLL.
*
- * This is a delta-sigma DAC, assuming an external low pass filter.
+ * This is a second-order delta-sigma DAC, assuming an external
+ * low pass filter.
+ *
+ * FIX: This should be broken into modules for each channel. It's
+ * ridiculous to have the channels explicit in the code.
*/
`define MSB (BITS-1)
@@ -33,12 +37,19 @@ module sound(
reg [`MSB:0] data_latch_l;
reg [`MSB:0] data_latch_r;
+ wire [`DBITS:0] delta2_add_l;
+ wire [`DBITS:0] delta2_add_r;
wire [`DBITS:0] delta_add_l;
wire [`DBITS:0] delta_add_r;
+ wire [`DBITS:0] sigma2_add_l;
+ wire [`DBITS:0] sigma2_add_r;
wire [`DBITS:0] sigma_add_l;
wire [`DBITS:0] sigma_add_r;
+ reg [`DBITS:0] sigma2_latch_l;
+ reg [`DBITS:0] sigma2_latch_r;
+
reg [`DBITS:0] sigma_latch_l;
reg [`DBITS:0] sigma_latch_r;
@@ -48,7 +59,7 @@ module sound(
reg out_latch_l;
reg out_latch_r;
- reg [12:0] pulse_ctr;
+ reg [11:0] pulse_ctr;
// This gives about 12-bit sound at 44100 Hz. A high sample rate will
// help avoid actually making the sampling frequency audible.
@@ -57,14 +68,20 @@ module sound(
// Note: the input is expected unsigned. For signed input, invert
// bit `MSB.
+
+ assign delta2_add_l = { 2'b0, data_latch_l } + delta_l;
+ assign sigma2_add_l = delta2_add_l + sigma2_latch_l;
- assign delta_add_l = { 2'b0, data_latch_l } + delta_l;
+ assign delta_add_l = sigma2_add_l + delta_l;
assign sigma_add_l = delta_add_l + sigma_latch_l;
assign delta_l[`DBITS] = sigma_latch_l[`DBITS];
assign delta_l[`DBITS-1] = sigma_latch_l[`DBITS];
assign delta_l[`DBITS-2:0] = 0;
- assign delta_add_r = { 2'b0, data_latch_r } + delta_r;
+ assign delta2_add_r = { 2'b0, data_latch_r } + delta_r;
+ assign sigma2_add_r = delta2_add_r + sigma2_latch_r;
+
+ assign delta_add_r = sigma2_add_r + delta_r;
assign sigma_add_r = delta_add_r + sigma_latch_r;
assign delta_r[`DBITS] = sigma_latch_r[`DBITS];
assign delta_r[`DBITS-1] = sigma_latch_r[`DBITS];
@@ -74,7 +91,8 @@ module sound(
begin
if ( pulse_ctr == 0 )
begin
- pulse_ctr <= 4535-1; // 200 MHz/44100 Hz sample rate
+ // 2268 is the oversampling ratio (100 MHz/44100 Hz)
+ pulse_ctr <= 2268-1;
data_latch_l <= data_l;
data_latch_r <= data_r;
end
@@ -84,15 +102,17 @@ module sound(
end
out_latch_l <= sigma_latch_l[`DBITS];
- sigma_latch_l <= sigma_add_l;
+ sigma_latch_l <= sigma_add_l;
+ sigma2_latch_l <= sigma2_add_l;
out_latch_r <= sigma_latch_r[`DBITS];
sigma_latch_r <= sigma_add_r;
+ sigma2_latch_r <= sigma2_add_r;
end
// Definitely *not* a 50% duty cycle; goes high immediately after
// the data item has been latched
- assign audio_clk = pulse_ctr[12];
+ assign audio_clk = pulse_ctr[11];
assign audio_l = out_latch_l;
assign audio_r = out_latch_r;