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authorH. Peter Anvin <hpa@zytor.com>2011-11-10 19:13:03 (GMT)
committerH. Peter Anvin <hpa@zytor.com>2014-02-11 02:07:51 (GMT)
commite76aee326f79b469e7b13166ed5468da355d99e2 (patch)
tree866ca17b1cd1922b847fd43463b1d0fc25f012d9
parent7c8deb987b2f9b3302162037d296ba4660b26903 (diff)
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vdufifo: make deeper (32 words) and simplify
Make the VDU FIFO deeper -- 32 words instead of 16 -- as there has been some visual signs of FIFO exhaustion. Simplify by removing unnecessary synchronization and status signals that are unused anyway.
-rw-r--r--mega/vdufifo.v64
-rw-r--r--sdram.v6
2 files changed, 28 insertions, 42 deletions
diff --git a/mega/vdufifo.v b/mega/vdufifo.v
index 1d17eba..9f125a6 100644
--- a/mega/vdufifo.v
+++ b/mega/vdufifo.v
@@ -44,8 +44,6 @@ module vdufifo (
wrclk,
wrreq,
q,
- rdempty,
- wrfull,
wrusedw);
input aclr;
@@ -55,9 +53,7 @@ module vdufifo (
input wrclk;
input wrreq;
output [15:0] q;
- output rdempty;
- output wrfull;
- output [3:0] wrusedw;
+ output [4:0] wrusedw;
`ifndef ALTERA_RESERVED_QIS
// synopsys translate_off
`endif
@@ -66,43 +62,39 @@ module vdufifo (
// synopsys translate_on
`endif
- wire sub_wire0;
- wire [15:0] sub_wire1;
- wire sub_wire2;
- wire [3:0] sub_wire3;
- wire wrfull = sub_wire0;
- wire [15:0] q = sub_wire1[15:0];
- wire rdempty = sub_wire2;
- wire [3:0] wrusedw = sub_wire3[3:0];
+ wire [15:0] sub_wire0;
+ wire [4:0] sub_wire1;
+ wire [15:0] q = sub_wire0[15:0];
+ wire [4:0] wrusedw = sub_wire1[4:0];
dcfifo dcfifo_component (
- .rdclk (rdclk),
- .wrclk (wrclk),
- .wrreq (wrreq),
.aclr (aclr),
.data (data),
+ .rdclk (rdclk),
.rdreq (rdreq),
- .wrfull (sub_wire0),
- .q (sub_wire1),
- .rdempty (sub_wire2),
- .wrusedw (sub_wire3),
+ .wrclk (wrclk),
+ .wrreq (wrreq),
+ .q (sub_wire0),
+ .wrusedw (sub_wire1),
+ .rdempty (),
.rdfull (),
.rdusedw (),
- .wrempty ());
+ .wrempty (),
+ .wrfull ());
defparam
dcfifo_component.intended_device_family = "Cyclone II",
dcfifo_component.lpm_hint = "MAXIMIZE_SPEED=5,",
- dcfifo_component.lpm_numwords = 16,
+ dcfifo_component.lpm_numwords = 32,
dcfifo_component.lpm_showahead = "ON",
dcfifo_component.lpm_type = "dcfifo",
dcfifo_component.lpm_width = 16,
- dcfifo_component.lpm_widthu = 4,
+ dcfifo_component.lpm_widthu = 5,
dcfifo_component.overflow_checking = "ON",
- dcfifo_component.rdsync_delaypipe = 5,
+ dcfifo_component.rdsync_delaypipe = 3,
dcfifo_component.underflow_checking = "ON",
dcfifo_component.use_eab = "ON",
dcfifo_component.write_aclr_synch = "ON",
- dcfifo_component.wrsync_delaypipe = 5;
+ dcfifo_component.wrsync_delaypipe = 3;
endmodule
@@ -116,7 +108,7 @@ endmodule
// Retrieval info: PRIVATE: AlmostFullThr NUMERIC "-1"
// Retrieval info: PRIVATE: CLOCKS_ARE_SYNCHRONIZED NUMERIC "0"
// Retrieval info: PRIVATE: Clock NUMERIC "4"
-// Retrieval info: PRIVATE: Depth NUMERIC "16"
+// Retrieval info: PRIVATE: Depth NUMERIC "32"
// Retrieval info: PRIVATE: Empty NUMERIC "1"
// Retrieval info: PRIVATE: Full NUMERIC "1"
// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone II"
@@ -134,38 +126,36 @@ endmodule
// Retrieval info: PRIVATE: diff_widths NUMERIC "0"
// Retrieval info: PRIVATE: msb_usedw NUMERIC "0"
// Retrieval info: PRIVATE: output_width NUMERIC "16"
-// Retrieval info: PRIVATE: rsEmpty NUMERIC "1"
+// Retrieval info: PRIVATE: rsEmpty NUMERIC "0"
// Retrieval info: PRIVATE: rsFull NUMERIC "0"
// Retrieval info: PRIVATE: rsUsedW NUMERIC "0"
// Retrieval info: PRIVATE: sc_aclr NUMERIC "0"
// Retrieval info: PRIVATE: sc_sclr NUMERIC "0"
// Retrieval info: PRIVATE: wsEmpty NUMERIC "0"
-// Retrieval info: PRIVATE: wsFull NUMERIC "1"
+// Retrieval info: PRIVATE: wsFull NUMERIC "0"
// Retrieval info: PRIVATE: wsUsedW NUMERIC "1"
// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone II"
// Retrieval info: CONSTANT: LPM_HINT STRING "MAXIMIZE_SPEED=5,"
-// Retrieval info: CONSTANT: LPM_NUMWORDS NUMERIC "16"
+// Retrieval info: CONSTANT: LPM_NUMWORDS NUMERIC "32"
// Retrieval info: CONSTANT: LPM_SHOWAHEAD STRING "ON"
// Retrieval info: CONSTANT: LPM_TYPE STRING "dcfifo"
// Retrieval info: CONSTANT: LPM_WIDTH NUMERIC "16"
-// Retrieval info: CONSTANT: LPM_WIDTHU NUMERIC "4"
+// Retrieval info: CONSTANT: LPM_WIDTHU NUMERIC "5"
// Retrieval info: CONSTANT: OVERFLOW_CHECKING STRING "ON"
-// Retrieval info: CONSTANT: RDSYNC_DELAYPIPE NUMERIC "5"
+// Retrieval info: CONSTANT: RDSYNC_DELAYPIPE NUMERIC "3"
// Retrieval info: CONSTANT: UNDERFLOW_CHECKING STRING "ON"
// Retrieval info: CONSTANT: USE_EAB STRING "ON"
// Retrieval info: CONSTANT: WRITE_ACLR_SYNCH STRING "ON"
-// Retrieval info: CONSTANT: WRSYNC_DELAYPIPE NUMERIC "5"
+// Retrieval info: CONSTANT: WRSYNC_DELAYPIPE NUMERIC "3"
// Retrieval info: USED_PORT: aclr 0 0 0 0 INPUT GND "aclr"
// Retrieval info: USED_PORT: data 0 0 16 0 INPUT NODEFVAL "data[15..0]"
// Retrieval info: USED_PORT: q 0 0 16 0 OUTPUT NODEFVAL "q[15..0]"
// Retrieval info: USED_PORT: rdclk 0 0 0 0 INPUT NODEFVAL "rdclk"
-// Retrieval info: USED_PORT: rdempty 0 0 0 0 OUTPUT NODEFVAL "rdempty"
// Retrieval info: USED_PORT: rdreq 0 0 0 0 INPUT NODEFVAL "rdreq"
// Retrieval info: USED_PORT: wrclk 0 0 0 0 INPUT NODEFVAL "wrclk"
-// Retrieval info: USED_PORT: wrfull 0 0 0 0 OUTPUT NODEFVAL "wrfull"
// Retrieval info: USED_PORT: wrreq 0 0 0 0 INPUT NODEFVAL "wrreq"
-// Retrieval info: USED_PORT: wrusedw 0 0 4 0 OUTPUT NODEFVAL "wrusedw[3..0]"
+// Retrieval info: USED_PORT: wrusedw 0 0 5 0 OUTPUT NODEFVAL "wrusedw[4..0]"
// Retrieval info: CONNECT: @aclr 0 0 0 0 aclr 0 0 0 0
// Retrieval info: CONNECT: @data 0 0 16 0 data 0 0 16 0
// Retrieval info: CONNECT: @rdclk 0 0 0 0 rdclk 0 0 0 0
@@ -173,9 +163,7 @@ endmodule
// Retrieval info: CONNECT: @wrclk 0 0 0 0 wrclk 0 0 0 0
// Retrieval info: CONNECT: @wrreq 0 0 0 0 wrreq 0 0 0 0
// Retrieval info: CONNECT: q 0 0 16 0 @q 0 0 16 0
-// Retrieval info: CONNECT: rdempty 0 0 0 0 @rdempty 0 0 0 0
-// Retrieval info: CONNECT: wrfull 0 0 0 0 @wrfull 0 0 0 0
-// Retrieval info: CONNECT: wrusedw 0 0 4 0 @wrusedw 0 0 4 0
+// Retrieval info: CONNECT: wrusedw 0 0 5 0 @wrusedw 0 0 5 0
// Retrieval info: GEN_FILE: TYPE_NORMAL vdufifo.v TRUE
// Retrieval info: GEN_FILE: TYPE_NORMAL vdufifo.inc FALSE
// Retrieval info: GEN_FILE: TYPE_NORMAL vdufifo.cmp FALSE
diff --git a/sdram.v b/sdram.v
index 2e15358..2741d5f 100644
--- a/sdram.v
+++ b/sdram.v
@@ -84,7 +84,7 @@ module sdram (
// VDU line FIFO
//
reg vdu_rdy; // dram_dq contains data for VDU
- wire [3:0] vdu_used;
+ wire [4:0] vdu_used;
reg [6:0] vdu_ctr;
reg [1:0] vdu_skip;
@@ -97,7 +97,7 @@ module sdram (
// of delays in the reporting of the output count, we need to have space
// for two bursts: one that is started before we notice we are almost
// full, and one to deal with fractionals.
- wire vdu_go = ~vdu_start & ~&vdu_used[3] & |vdu_ctr;
+ wire vdu_go = ~vdu_start & ~&vdu_used[4:3] & |vdu_ctr;
vdufifo vdufifo (
.aclr ( ~rst_n | vdu_start ),
@@ -107,8 +107,6 @@ module sdram (
.wrclk ( dram_clk ),
.wrreq ( vdu_rdy & ~|vdu_skip ),
.q ( vdu_d ),
- .rdempty ( ),
- .wrfull ( ),
.wrusedw ( vdu_used )
);