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authorH. Peter Anvin <hpa@zytor.com>2016-10-23 11:16:07 (GMT)
committerH. Peter Anvin <hpa@zytor.com>2016-10-23 11:16:07 (GMT)
commitc846596ccdc554f72c89fbfae2489670995364dc (patch)
treefb5a05f9cd7d5a30b1105d8a5b4d04e79303c0be
parent478032bb8a9f064357803da3fd3bec7d0ac58a9e (diff)
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abc80.qsf: add mega/bgram.v
-rw-r--r--abc80.qsf1
1 files changed, 1 insertions, 0 deletions
diff --git a/abc80.qsf b/abc80.qsf
index a2ecb87..dd7f9f7 100644
--- a/abc80.qsf
+++ b/abc80.qsf
@@ -545,6 +545,7 @@ set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "NO HEAT SINK WITH STI
set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
set_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS ON
set_global_assignment -name PARALLEL_SYNTHESIS ON
+set_global_assignment -name VERILOG_FILE mega/bgram.v
set_global_assignment -name VERILOG_FILE enc28j60.v
set_global_assignment -name VERILOG_FILE mega/fgcolrom.v
set_global_assignment -name MIF_FILE data/fgcol.mif